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  1. /**
  2. ******************************************************************************
  3. * @file stm32h7xx_hal_tim_ex.c
  4. * @author MCD Application Team
  5. * @brief TIM HAL module driver.
  6. * This file provides firmware functions to manage the following
  7. * functionalities of the Timer Extended peripheral:
  8. * + Time Hall Sensor Interface Initialization
  9. * + Time Hall Sensor Interface Start
  10. * + Time Complementary signal break and dead time configuration
  11. * + Time Master and Slave synchronization configuration
  12. * + Time Output Compare/PWM Channel Configuration (for channels 5 and 6)
  13. * + Timer remapping capabilities configuration
  14. @verbatim
  15. ==============================================================================
  16. ##### TIMER Extended features #####
  17. ==============================================================================
  18. [..]
  19. The Timer Extended features include:
  20. (#) Complementary outputs with programmable dead-time for :
  21. (++) Output Compare
  22. (++) PWM generation (Edge and Center-aligned Mode)
  23. (++) One-pulse mode output
  24. (#) Synchronization circuit to control the timer with external signals and to
  25. interconnect several timers together.
  26. (#) Break input to put the timer output signals in reset state or in a known state.
  27. (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
  28. positioning purposes
  29. ##### How to use this driver #####
  30. ==============================================================================
  31. [..]
  32. (#) Initialize the TIM low level resources by implementing the following functions
  33. depending on the selected feature:
  34. (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit()
  35. (#) Initialize the TIM low level resources :
  36. (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
  37. (##) TIM pins configuration
  38. (+++) Enable the clock for the TIM GPIOs using the following function:
  39. __HAL_RCC_GPIOx_CLK_ENABLE();
  40. (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
  41. (#) The external Clock can be configured, if needed (the default clock is the
  42. internal clock from the APBx), using the following function:
  43. HAL_TIM_ConfigClockSource, the clock configuration should be done before
  44. any start function.
  45. (#) Configure the TIM in the desired functioning mode using one of the
  46. initialization function of this driver:
  47. (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutEvent(): to use the
  48. Timer Hall Sensor Interface and the commutation event with the corresponding
  49. Interrupt and DMA request if needed (Note that One Timer is used to interface
  50. with the Hall sensor Interface and another Timer should be used to use
  51. the commutation event).
  52. (#) Activate the TIM peripheral using one of the start functions:
  53. (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OC_Start_IT()
  54. (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT()
  55. (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
  56. (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT().
  57. @endverbatim
  58. ******************************************************************************
  59. * @attention
  60. *
  61. * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  62. * All rights reserved.</center></h2>
  63. *
  64. * This software component is licensed by ST under BSD 3-Clause license,
  65. * the "License"; You may not use this file except in compliance with the
  66. * License. You may obtain a copy of the License at:
  67. * opensource.org/licenses/BSD-3-Clause
  68. *
  69. ******************************************************************************
  70. */
  71. /* Includes ------------------------------------------------------------------*/
  72. #include "stm32h7xx_hal.h"
  73. /** @addtogroup STM32H7xx_HAL_Driver
  74. * @{
  75. */
  76. /** @defgroup TIMEx TIMEx
  77. * @brief TIM Extended HAL module driver
  78. * @{
  79. */
  80. #ifdef HAL_TIM_MODULE_ENABLED
  81. /* Private typedef -----------------------------------------------------------*/
  82. /* Private define ------------------------------------------------------------*/
  83. /* Private macro -------------------------------------------------------------*/
  84. /* Private variables ---------------------------------------------------------*/
  85. /* Private function prototypes -----------------------------------------------*/
  86. static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState);
  87. /* Exported functions --------------------------------------------------------*/
  88. /** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions
  89. * @{
  90. */
  91. /** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
  92. * @brief Timer Hall Sensor functions
  93. *
  94. @verbatim
  95. ==============================================================================
  96. ##### Timer Hall Sensor functions #####
  97. ==============================================================================
  98. [..]
  99. This section provides functions allowing to:
  100. (+) Initialize and configure TIM HAL Sensor.
  101. (+) De-initialize TIM HAL Sensor.
  102. (+) Start the Hall Sensor Interface.
  103. (+) Stop the Hall Sensor Interface.
  104. (+) Start the Hall Sensor Interface and enable interrupts.
  105. (+) Stop the Hall Sensor Interface and disable interrupts.
  106. (+) Start the Hall Sensor Interface and enable DMA transfers.
  107. (+) Stop the Hall Sensor Interface and disable DMA transfers.
  108. @endverbatim
  109. * @{
  110. */
  111. /**
  112. * @brief Initializes the TIM Hall Sensor Interface and initialize the associated handle.
  113. * @param htim TIM Hall Sensor Interface handle
  114. * @param sConfig TIM Hall Sensor configuration structure
  115. * @retval HAL status
  116. */
  117. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig)
  118. {
  119. TIM_OC_InitTypeDef OC_Config;
  120. /* Check the TIM handle allocation */
  121. if (htim == NULL)
  122. {
  123. return HAL_ERROR;
  124. }
  125. /* Check the parameters */
  126. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  127. assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
  128. assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
  129. assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
  130. assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
  131. assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
  132. assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));
  133. if (htim->State == HAL_TIM_STATE_RESET)
  134. {
  135. /* Allocate lock resource and initialize it */
  136. htim->Lock = HAL_UNLOCKED;
  137. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  138. /* Reset interrupt callbacks to legacy week callbacks */
  139. TIM_ResetCallback(htim);
  140. if (htim->HallSensor_MspInitCallback == NULL)
  141. {
  142. htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit;
  143. }
  144. /* Init the low level hardware : GPIO, CLOCK, NVIC */
  145. htim->HallSensor_MspInitCallback(htim);
  146. #else
  147. /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
  148. HAL_TIMEx_HallSensor_MspInit(htim);
  149. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  150. }
  151. /* Set the TIM state */
  152. htim->State = HAL_TIM_STATE_BUSY;
  153. /* Configure the Time base in the Encoder Mode */
  154. TIM_Base_SetConfig(htim->Instance, &htim->Init);
  155. /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the Hall sensor */
  156. TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
  157. /* Reset the IC1PSC Bits */
  158. htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
  159. /* Set the IC1PSC value */
  160. htim->Instance->CCMR1 |= sConfig->IC1Prescaler;
  161. /* Enable the Hall sensor interface (XOR function of the three inputs) */
  162. htim->Instance->CR2 |= TIM_CR2_TI1S;
  163. /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
  164. htim->Instance->SMCR &= ~TIM_SMCR_TS;
  165. htim->Instance->SMCR |= TIM_TS_TI1F_ED;
  166. /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
  167. htim->Instance->SMCR &= ~TIM_SMCR_SMS;
  168. htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;
  169. /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
  170. OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
  171. OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
  172. OC_Config.OCMode = TIM_OCMODE_PWM2;
  173. OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
  174. OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
  175. OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
  176. OC_Config.Pulse = sConfig->Commutation_Delay;
  177. TIM_OC2_SetConfig(htim->Instance, &OC_Config);
  178. /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
  179. register to 101 */
  180. htim->Instance->CR2 &= ~TIM_CR2_MMS;
  181. htim->Instance->CR2 |= TIM_TRGO_OC2REF;
  182. /* Initialize the TIM state*/
  183. htim->State = HAL_TIM_STATE_READY;
  184. return HAL_OK;
  185. }
  186. /**
  187. * @brief DeInitializes the TIM Hall Sensor interface
  188. * @param htim TIM Hall Sensor Interface handle
  189. * @retval HAL status
  190. */
  191. HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
  192. {
  193. /* Check the parameters */
  194. assert_param(IS_TIM_INSTANCE(htim->Instance));
  195. htim->State = HAL_TIM_STATE_BUSY;
  196. /* Disable the TIM Peripheral Clock */
  197. __HAL_TIM_DISABLE(htim);
  198. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  199. if (htim->HallSensor_MspDeInitCallback == NULL)
  200. {
  201. htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit;
  202. }
  203. /* DeInit the low level hardware */
  204. htim->HallSensor_MspDeInitCallback(htim);
  205. #else
  206. /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
  207. HAL_TIMEx_HallSensor_MspDeInit(htim);
  208. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  209. /* Change TIM state */
  210. htim->State = HAL_TIM_STATE_RESET;
  211. /* Release Lock */
  212. __HAL_UNLOCK(htim);
  213. return HAL_OK;
  214. }
  215. /**
  216. * @brief Initializes the TIM Hall Sensor MSP.
  217. * @param htim TIM Hall Sensor Interface handle
  218. * @retval None
  219. */
  220. __weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
  221. {
  222. /* Prevent unused argument(s) compilation warning */
  223. UNUSED(htim);
  224. /* NOTE : This function should not be modified, when the callback is needed,
  225. the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
  226. */
  227. }
  228. /**
  229. * @brief DeInitializes TIM Hall Sensor MSP.
  230. * @param htim TIM Hall Sensor Interface handle
  231. * @retval None
  232. */
  233. __weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
  234. {
  235. /* Prevent unused argument(s) compilation warning */
  236. UNUSED(htim);
  237. /* NOTE : This function should not be modified, when the callback is needed,
  238. the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
  239. */
  240. }
  241. /**
  242. * @brief Starts the TIM Hall Sensor Interface.
  243. * @param htim TIM Hall Sensor Interface handle
  244. * @retval HAL status
  245. */
  246. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
  247. {
  248. uint32_t tmpsmcr;
  249. /* Check the parameters */
  250. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  251. /* Enable the Input Capture channel 1
  252. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  253. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
  254. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  255. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  256. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  257. {
  258. __HAL_TIM_ENABLE(htim);
  259. }
  260. /* Return function status */
  261. return HAL_OK;
  262. }
  263. /**
  264. * @brief Stops the TIM Hall sensor Interface.
  265. * @param htim TIM Hall Sensor Interface handle
  266. * @retval HAL status
  267. */
  268. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
  269. {
  270. /* Check the parameters */
  271. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  272. /* Disable the Input Capture channels 1, 2 and 3
  273. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  274. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
  275. /* Disable the Peripheral */
  276. __HAL_TIM_DISABLE(htim);
  277. /* Return function status */
  278. return HAL_OK;
  279. }
  280. /**
  281. * @brief Starts the TIM Hall Sensor Interface in interrupt mode.
  282. * @param htim TIM Hall Sensor Interface handle
  283. * @retval HAL status
  284. */
  285. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
  286. {
  287. uint32_t tmpsmcr;
  288. /* Check the parameters */
  289. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  290. /* Enable the capture compare Interrupts 1 event */
  291. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  292. /* Enable the Input Capture channel 1
  293. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  294. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
  295. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  296. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  297. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  298. {
  299. __HAL_TIM_ENABLE(htim);
  300. }
  301. /* Return function status */
  302. return HAL_OK;
  303. }
  304. /**
  305. * @brief Stops the TIM Hall Sensor Interface in interrupt mode.
  306. * @param htim TIM Hall Sensor Interface handle
  307. * @retval HAL status
  308. */
  309. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
  310. {
  311. /* Check the parameters */
  312. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  313. /* Disable the Input Capture channel 1
  314. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  315. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
  316. /* Disable the capture compare Interrupts event */
  317. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  318. /* Disable the Peripheral */
  319. __HAL_TIM_DISABLE(htim);
  320. /* Return function status */
  321. return HAL_OK;
  322. }
  323. /**
  324. * @brief Starts the TIM Hall Sensor Interface in DMA mode.
  325. * @param htim TIM Hall Sensor Interface handle
  326. * @param pData The destination Buffer address.
  327. * @param Length The length of data to be transferred from TIM peripheral to memory.
  328. * @retval HAL status
  329. */
  330. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
  331. {
  332. uint32_t tmpsmcr;
  333. /* Check the parameters */
  334. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  335. if (htim->State == HAL_TIM_STATE_BUSY)
  336. {
  337. return HAL_BUSY;
  338. }
  339. else if (htim->State == HAL_TIM_STATE_READY)
  340. {
  341. if (((uint32_t)pData == 0U) && (Length > 0U))
  342. {
  343. return HAL_ERROR;
  344. }
  345. else
  346. {
  347. htim->State = HAL_TIM_STATE_BUSY;
  348. }
  349. }
  350. else
  351. {
  352. /* nothing to do */
  353. }
  354. /* Enable the Input Capture channel 1
  355. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  356. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);
  357. /* Set the DMA Input Capture 1 Callbacks */
  358. htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
  359. htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
  360. /* Set the DMA error callback */
  361. htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
  362. /* Enable the DMA stream for Capture 1*/
  363. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length) != HAL_OK)
  364. {
  365. return HAL_ERROR;
  366. }
  367. /* Enable the capture compare 1 Interrupt */
  368. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
  369. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  370. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  371. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  372. {
  373. __HAL_TIM_ENABLE(htim);
  374. }
  375. /* Return function status */
  376. return HAL_OK;
  377. }
  378. /**
  379. * @brief Stops the TIM Hall Sensor Interface in DMA mode.
  380. * @param htim TIM Hall Sensor Interface handle
  381. * @retval HAL status
  382. */
  383. HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
  384. {
  385. /* Check the parameters */
  386. assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
  387. /* Disable the Input Capture channel 1
  388. (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  389. TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
  390. /* Disable the capture compare Interrupts 1 event */
  391. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
  392. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
  393. /* Disable the Peripheral */
  394. __HAL_TIM_DISABLE(htim);
  395. /* Return function status */
  396. return HAL_OK;
  397. }
  398. /**
  399. * @}
  400. */
  401. /** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
  402. * @brief Timer Complementary Output Compare functions
  403. *
  404. @verbatim
  405. ==============================================================================
  406. ##### Timer Complementary Output Compare functions #####
  407. ==============================================================================
  408. [..]
  409. This section provides functions allowing to:
  410. (+) Start the Complementary Output Compare/PWM.
  411. (+) Stop the Complementary Output Compare/PWM.
  412. (+) Start the Complementary Output Compare/PWM and enable interrupts.
  413. (+) Stop the Complementary Output Compare/PWM and disable interrupts.
  414. (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
  415. (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
  416. @endverbatim
  417. * @{
  418. */
  419. /**
  420. * @brief Starts the TIM Output Compare signal generation on the complementary
  421. * output.
  422. * @param htim TIM Output Compare handle
  423. * @param Channel TIM Channel to be enabled
  424. * This parameter can be one of the following values:
  425. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  426. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  427. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  428. * @retval HAL status
  429. */
  430. HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
  431. {
  432. uint32_t tmpsmcr;
  433. /* Check the parameters */
  434. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  435. /* Enable the Capture compare channel N */
  436. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  437. /* Enable the Main Output */
  438. __HAL_TIM_MOE_ENABLE(htim);
  439. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  440. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  441. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  442. {
  443. __HAL_TIM_ENABLE(htim);
  444. }
  445. /* Return function status */
  446. return HAL_OK;
  447. }
  448. /**
  449. * @brief Stops the TIM Output Compare signal generation on the complementary
  450. * output.
  451. * @param htim TIM handle
  452. * @param Channel TIM Channel to be disabled
  453. * This parameter can be one of the following values:
  454. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  455. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  456. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  457. * @retval HAL status
  458. */
  459. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
  460. {
  461. /* Check the parameters */
  462. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  463. /* Disable the Capture compare channel N */
  464. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  465. /* Disable the Main Output */
  466. __HAL_TIM_MOE_DISABLE(htim);
  467. /* Disable the Peripheral */
  468. __HAL_TIM_DISABLE(htim);
  469. /* Return function status */
  470. return HAL_OK;
  471. }
  472. /**
  473. * @brief Starts the TIM Output Compare signal generation in interrupt mode
  474. * on the complementary output.
  475. * @param htim TIM OC handle
  476. * @param Channel TIM Channel to be enabled
  477. * This parameter can be one of the following values:
  478. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  479. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  480. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  481. * @retval HAL status
  482. */
  483. HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  484. {
  485. uint32_t tmpsmcr;
  486. /* Check the parameters */
  487. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  488. switch (Channel)
  489. {
  490. case TIM_CHANNEL_1:
  491. {
  492. /* Enable the TIM Output Compare interrupt */
  493. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  494. break;
  495. }
  496. case TIM_CHANNEL_2:
  497. {
  498. /* Enable the TIM Output Compare interrupt */
  499. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
  500. break;
  501. }
  502. case TIM_CHANNEL_3:
  503. {
  504. /* Enable the TIM Output Compare interrupt */
  505. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
  506. break;
  507. }
  508. default:
  509. break;
  510. }
  511. /* Enable the TIM Break interrupt */
  512. __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
  513. /* Enable the Capture compare channel N */
  514. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  515. /* Enable the Main Output */
  516. __HAL_TIM_MOE_ENABLE(htim);
  517. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  518. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  519. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  520. {
  521. __HAL_TIM_ENABLE(htim);
  522. }
  523. /* Return function status */
  524. return HAL_OK;
  525. }
  526. /**
  527. * @brief Stops the TIM Output Compare signal generation in interrupt mode
  528. * on the complementary output.
  529. * @param htim TIM Output Compare handle
  530. * @param Channel TIM Channel to be disabled
  531. * This parameter can be one of the following values:
  532. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  533. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  534. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  535. * @retval HAL status
  536. */
  537. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  538. {
  539. uint32_t tmpccer;
  540. /* Check the parameters */
  541. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  542. switch (Channel)
  543. {
  544. case TIM_CHANNEL_1:
  545. {
  546. /* Disable the TIM Output Compare interrupt */
  547. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  548. break;
  549. }
  550. case TIM_CHANNEL_2:
  551. {
  552. /* Disable the TIM Output Compare interrupt */
  553. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
  554. break;
  555. }
  556. case TIM_CHANNEL_3:
  557. {
  558. /* Disable the TIM Output Compare interrupt */
  559. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
  560. break;
  561. }
  562. default:
  563. break;
  564. }
  565. /* Disable the Capture compare channel N */
  566. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  567. /* Disable the TIM Break interrupt (only if no more channel is active) */
  568. tmpccer = htim->Instance->CCER;
  569. if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
  570. {
  571. __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
  572. }
  573. /* Disable the Main Output */
  574. __HAL_TIM_MOE_DISABLE(htim);
  575. /* Disable the Peripheral */
  576. __HAL_TIM_DISABLE(htim);
  577. /* Return function status */
  578. return HAL_OK;
  579. }
  580. /**
  581. * @brief Starts the TIM Output Compare signal generation in DMA mode
  582. * on the complementary output.
  583. * @param htim TIM Output Compare handle
  584. * @param Channel TIM Channel to be enabled
  585. * This parameter can be one of the following values:
  586. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  587. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  588. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  589. * @param pData The source Buffer address.
  590. * @param Length The length of data to be transferred from memory to TIM peripheral
  591. * @retval HAL status
  592. */
  593. HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
  594. {
  595. uint32_t tmpsmcr;
  596. /* Check the parameters */
  597. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  598. if (htim->State == HAL_TIM_STATE_BUSY)
  599. {
  600. return HAL_BUSY;
  601. }
  602. else if (htim->State == HAL_TIM_STATE_READY)
  603. {
  604. if (((uint32_t)pData == 0U) && (Length > 0U))
  605. {
  606. return HAL_ERROR;
  607. }
  608. else
  609. {
  610. htim->State = HAL_TIM_STATE_BUSY;
  611. }
  612. }
  613. else
  614. {
  615. /* nothing to do */
  616. }
  617. switch (Channel)
  618. {
  619. case TIM_CHANNEL_1:
  620. {
  621. /* Set the DMA compare callbacks */
  622. htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
  623. htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  624. /* Set the DMA error callback */
  625. htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
  626. /* Enable the DMA stream */
  627. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK)
  628. {
  629. return HAL_ERROR;
  630. }
  631. /* Enable the TIM Output Compare DMA request */
  632. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
  633. break;
  634. }
  635. case TIM_CHANNEL_2:
  636. {
  637. /* Set the DMA compare callbacks */
  638. htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
  639. htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  640. /* Set the DMA error callback */
  641. htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
  642. /* Enable the DMA stream */
  643. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK)
  644. {
  645. return HAL_ERROR;
  646. }
  647. /* Enable the TIM Output Compare DMA request */
  648. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
  649. break;
  650. }
  651. case TIM_CHANNEL_3:
  652. {
  653. /* Set the DMA compare callbacks */
  654. htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
  655. htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  656. /* Set the DMA error callback */
  657. htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
  658. /* Enable the DMA stream */
  659. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK)
  660. {
  661. return HAL_ERROR;
  662. }
  663. /* Enable the TIM Output Compare DMA request */
  664. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
  665. break;
  666. }
  667. default:
  668. break;
  669. }
  670. /* Enable the Capture compare channel N */
  671. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  672. /* Enable the Main Output */
  673. __HAL_TIM_MOE_ENABLE(htim);
  674. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  675. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  676. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  677. {
  678. __HAL_TIM_ENABLE(htim);
  679. }
  680. /* Return function status */
  681. return HAL_OK;
  682. }
  683. /**
  684. * @brief Stops the TIM Output Compare signal generation in DMA mode
  685. * on the complementary output.
  686. * @param htim TIM Output Compare handle
  687. * @param Channel TIM Channel to be disabled
  688. * This parameter can be one of the following values:
  689. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  690. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  691. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  692. * @retval HAL status
  693. */
  694. HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
  695. {
  696. /* Check the parameters */
  697. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  698. switch (Channel)
  699. {
  700. case TIM_CHANNEL_1:
  701. {
  702. /* Disable the TIM Output Compare DMA request */
  703. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
  704. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
  705. break;
  706. }
  707. case TIM_CHANNEL_2:
  708. {
  709. /* Disable the TIM Output Compare DMA request */
  710. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
  711. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
  712. break;
  713. }
  714. case TIM_CHANNEL_3:
  715. {
  716. /* Disable the TIM Output Compare DMA request */
  717. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
  718. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
  719. break;
  720. }
  721. default:
  722. break;
  723. }
  724. /* Disable the Capture compare channel N */
  725. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  726. /* Disable the Main Output */
  727. __HAL_TIM_MOE_DISABLE(htim);
  728. /* Disable the Peripheral */
  729. __HAL_TIM_DISABLE(htim);
  730. /* Change the htim state */
  731. htim->State = HAL_TIM_STATE_READY;
  732. /* Return function status */
  733. return HAL_OK;
  734. }
  735. /**
  736. * @}
  737. */
  738. /** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
  739. * @brief Timer Complementary PWM functions
  740. *
  741. @verbatim
  742. ==============================================================================
  743. ##### Timer Complementary PWM functions #####
  744. ==============================================================================
  745. [..]
  746. This section provides functions allowing to:
  747. (+) Start the Complementary PWM.
  748. (+) Stop the Complementary PWM.
  749. (+) Start the Complementary PWM and enable interrupts.
  750. (+) Stop the Complementary PWM and disable interrupts.
  751. (+) Start the Complementary PWM and enable DMA transfers.
  752. (+) Stop the Complementary PWM and disable DMA transfers.
  753. (+) Start the Complementary Input Capture measurement.
  754. (+) Stop the Complementary Input Capture.
  755. (+) Start the Complementary Input Capture and enable interrupts.
  756. (+) Stop the Complementary Input Capture and disable interrupts.
  757. (+) Start the Complementary Input Capture and enable DMA transfers.
  758. (+) Stop the Complementary Input Capture and disable DMA transfers.
  759. (+) Start the Complementary One Pulse generation.
  760. (+) Stop the Complementary One Pulse.
  761. (+) Start the Complementary One Pulse and enable interrupts.
  762. (+) Stop the Complementary One Pulse and disable interrupts.
  763. @endverbatim
  764. * @{
  765. */
  766. /**
  767. * @brief Starts the PWM signal generation on the complementary output.
  768. * @param htim TIM handle
  769. * @param Channel TIM Channel to be enabled
  770. * This parameter can be one of the following values:
  771. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  772. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  773. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  774. * @retval HAL status
  775. */
  776. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
  777. {
  778. uint32_t tmpsmcr;
  779. /* Check the parameters */
  780. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  781. /* Enable the complementary PWM output */
  782. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  783. /* Enable the Main Output */
  784. __HAL_TIM_MOE_ENABLE(htim);
  785. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  786. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  787. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  788. {
  789. __HAL_TIM_ENABLE(htim);
  790. }
  791. /* Return function status */
  792. return HAL_OK;
  793. }
  794. /**
  795. * @brief Stops the PWM signal generation on the complementary output.
  796. * @param htim TIM handle
  797. * @param Channel TIM Channel to be disabled
  798. * This parameter can be one of the following values:
  799. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  800. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  801. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  802. * @retval HAL status
  803. */
  804. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
  805. {
  806. /* Check the parameters */
  807. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  808. /* Disable the complementary PWM output */
  809. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  810. /* Disable the Main Output */
  811. __HAL_TIM_MOE_DISABLE(htim);
  812. /* Disable the Peripheral */
  813. __HAL_TIM_DISABLE(htim);
  814. /* Return function status */
  815. return HAL_OK;
  816. }
  817. /**
  818. * @brief Starts the PWM signal generation in interrupt mode on the
  819. * complementary output.
  820. * @param htim TIM handle
  821. * @param Channel TIM Channel to be disabled
  822. * This parameter can be one of the following values:
  823. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  824. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  825. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  826. * @retval HAL status
  827. */
  828. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  829. {
  830. uint32_t tmpsmcr;
  831. /* Check the parameters */
  832. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  833. switch (Channel)
  834. {
  835. case TIM_CHANNEL_1:
  836. {
  837. /* Enable the TIM Capture/Compare 1 interrupt */
  838. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  839. break;
  840. }
  841. case TIM_CHANNEL_2:
  842. {
  843. /* Enable the TIM Capture/Compare 2 interrupt */
  844. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
  845. break;
  846. }
  847. case TIM_CHANNEL_3:
  848. {
  849. /* Enable the TIM Capture/Compare 3 interrupt */
  850. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
  851. break;
  852. }
  853. default:
  854. break;
  855. }
  856. /* Enable the TIM Break interrupt */
  857. __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
  858. /* Enable the complementary PWM output */
  859. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  860. /* Enable the Main Output */
  861. __HAL_TIM_MOE_ENABLE(htim);
  862. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  863. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  864. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  865. {
  866. __HAL_TIM_ENABLE(htim);
  867. }
  868. /* Return function status */
  869. return HAL_OK;
  870. }
  871. /**
  872. * @brief Stops the PWM signal generation in interrupt mode on the
  873. * complementary output.
  874. * @param htim TIM handle
  875. * @param Channel TIM Channel to be disabled
  876. * This parameter can be one of the following values:
  877. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  878. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  879. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  880. * @retval HAL status
  881. */
  882. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
  883. {
  884. uint32_t tmpccer;
  885. /* Check the parameters */
  886. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  887. switch (Channel)
  888. {
  889. case TIM_CHANNEL_1:
  890. {
  891. /* Disable the TIM Capture/Compare 1 interrupt */
  892. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  893. break;
  894. }
  895. case TIM_CHANNEL_2:
  896. {
  897. /* Disable the TIM Capture/Compare 2 interrupt */
  898. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
  899. break;
  900. }
  901. case TIM_CHANNEL_3:
  902. {
  903. /* Disable the TIM Capture/Compare 3 interrupt */
  904. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
  905. break;
  906. }
  907. default:
  908. break;
  909. }
  910. /* Disable the complementary PWM output */
  911. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  912. /* Disable the TIM Break interrupt (only if no more channel is active) */
  913. tmpccer = htim->Instance->CCER;
  914. if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
  915. {
  916. __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
  917. }
  918. /* Disable the Main Output */
  919. __HAL_TIM_MOE_DISABLE(htim);
  920. /* Disable the Peripheral */
  921. __HAL_TIM_DISABLE(htim);
  922. /* Return function status */
  923. return HAL_OK;
  924. }
  925. /**
  926. * @brief Starts the TIM PWM signal generation in DMA mode on the
  927. * complementary output
  928. * @param htim TIM handle
  929. * @param Channel TIM Channel to be enabled
  930. * This parameter can be one of the following values:
  931. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  932. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  933. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  934. * @param pData The source Buffer address.
  935. * @param Length The length of data to be transferred from memory to TIM peripheral
  936. * @retval HAL status
  937. */
  938. HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
  939. {
  940. uint32_t tmpsmcr;
  941. /* Check the parameters */
  942. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  943. if (htim->State == HAL_TIM_STATE_BUSY)
  944. {
  945. return HAL_BUSY;
  946. }
  947. else if (htim->State == HAL_TIM_STATE_READY)
  948. {
  949. if (((uint32_t)pData == 0U) && (Length > 0U))
  950. {
  951. return HAL_ERROR;
  952. }
  953. else
  954. {
  955. htim->State = HAL_TIM_STATE_BUSY;
  956. }
  957. }
  958. else
  959. {
  960. /* nothing to do */
  961. }
  962. switch (Channel)
  963. {
  964. case TIM_CHANNEL_1:
  965. {
  966. /* Set the DMA compare callbacks */
  967. htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
  968. htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  969. /* Set the DMA error callback */
  970. htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;
  971. /* Enable the DMA stream */
  972. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK)
  973. {
  974. return HAL_ERROR;
  975. }
  976. /* Enable the TIM Capture/Compare 1 DMA request */
  977. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
  978. break;
  979. }
  980. case TIM_CHANNEL_2:
  981. {
  982. /* Set the DMA compare callbacks */
  983. htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
  984. htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  985. /* Set the DMA error callback */
  986. htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;
  987. /* Enable the DMA stream */
  988. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK)
  989. {
  990. return HAL_ERROR;
  991. }
  992. /* Enable the TIM Capture/Compare 2 DMA request */
  993. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
  994. break;
  995. }
  996. case TIM_CHANNEL_3:
  997. {
  998. /* Set the DMA compare callbacks */
  999. htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
  1000. htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;
  1001. /* Set the DMA error callback */
  1002. htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;
  1003. /* Enable the DMA stream */
  1004. if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK)
  1005. {
  1006. return HAL_ERROR;
  1007. }
  1008. /* Enable the TIM Capture/Compare 3 DMA request */
  1009. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
  1010. break;
  1011. }
  1012. default:
  1013. break;
  1014. }
  1015. /* Enable the complementary PWM output */
  1016. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
  1017. /* Enable the Main Output */
  1018. __HAL_TIM_MOE_ENABLE(htim);
  1019. /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  1020. tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  1021. if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  1022. {
  1023. __HAL_TIM_ENABLE(htim);
  1024. }
  1025. /* Return function status */
  1026. return HAL_OK;
  1027. }
  1028. /**
  1029. * @brief Stops the TIM PWM signal generation in DMA mode on the complementary
  1030. * output
  1031. * @param htim TIM handle
  1032. * @param Channel TIM Channel to be disabled
  1033. * This parameter can be one of the following values:
  1034. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1035. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1036. * @arg TIM_CHANNEL_3: TIM Channel 3 selected
  1037. * @retval HAL status
  1038. */
  1039. HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
  1040. {
  1041. /* Check the parameters */
  1042. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
  1043. switch (Channel)
  1044. {
  1045. case TIM_CHANNEL_1:
  1046. {
  1047. /* Disable the TIM Capture/Compare 1 DMA request */
  1048. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
  1049. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
  1050. break;
  1051. }
  1052. case TIM_CHANNEL_2:
  1053. {
  1054. /* Disable the TIM Capture/Compare 2 DMA request */
  1055. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
  1056. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
  1057. break;
  1058. }
  1059. case TIM_CHANNEL_3:
  1060. {
  1061. /* Disable the TIM Capture/Compare 3 DMA request */
  1062. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
  1063. (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
  1064. break;
  1065. }
  1066. default:
  1067. break;
  1068. }
  1069. /* Disable the complementary PWM output */
  1070. TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
  1071. /* Disable the Main Output */
  1072. __HAL_TIM_MOE_DISABLE(htim);
  1073. /* Disable the Peripheral */
  1074. __HAL_TIM_DISABLE(htim);
  1075. /* Change the htim state */
  1076. htim->State = HAL_TIM_STATE_READY;
  1077. /* Return function status */
  1078. return HAL_OK;
  1079. }
  1080. /**
  1081. * @}
  1082. */
  1083. /** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
  1084. * @brief Timer Complementary One Pulse functions
  1085. *
  1086. @verbatim
  1087. ==============================================================================
  1088. ##### Timer Complementary One Pulse functions #####
  1089. ==============================================================================
  1090. [..]
  1091. This section provides functions allowing to:
  1092. (+) Start the Complementary One Pulse generation.
  1093. (+) Stop the Complementary One Pulse.
  1094. (+) Start the Complementary One Pulse and enable interrupts.
  1095. (+) Stop the Complementary One Pulse and disable interrupts.
  1096. @endverbatim
  1097. * @{
  1098. */
  1099. /**
  1100. * @brief Starts the TIM One Pulse signal generation on the complementary
  1101. * output.
  1102. * @param htim TIM One Pulse handle
  1103. * @param OutputChannel TIM Channel to be enabled
  1104. * This parameter can be one of the following values:
  1105. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1106. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1107. * @retval HAL status
  1108. */
  1109. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1110. {
  1111. /* Check the parameters */
  1112. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1113. /* Enable the complementary One Pulse output */
  1114. TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
  1115. /* Enable the Main Output */
  1116. __HAL_TIM_MOE_ENABLE(htim);
  1117. /* Return function status */
  1118. return HAL_OK;
  1119. }
  1120. /**
  1121. * @brief Stops the TIM One Pulse signal generation on the complementary
  1122. * output.
  1123. * @param htim TIM One Pulse handle
  1124. * @param OutputChannel TIM Channel to be disabled
  1125. * This parameter can be one of the following values:
  1126. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1127. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1128. * @retval HAL status
  1129. */
  1130. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1131. {
  1132. /* Check the parameters */
  1133. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1134. /* Disable the complementary One Pulse output */
  1135. TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
  1136. /* Disable the Main Output */
  1137. __HAL_TIM_MOE_DISABLE(htim);
  1138. /* Disable the Peripheral */
  1139. __HAL_TIM_DISABLE(htim);
  1140. /* Return function status */
  1141. return HAL_OK;
  1142. }
  1143. /**
  1144. * @brief Starts the TIM One Pulse signal generation in interrupt mode on the
  1145. * complementary channel.
  1146. * @param htim TIM One Pulse handle
  1147. * @param OutputChannel TIM Channel to be enabled
  1148. * This parameter can be one of the following values:
  1149. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1150. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1151. * @retval HAL status
  1152. */
  1153. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1154. {
  1155. /* Check the parameters */
  1156. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1157. /* Enable the TIM Capture/Compare 1 interrupt */
  1158. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
  1159. /* Enable the TIM Capture/Compare 2 interrupt */
  1160. __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
  1161. /* Enable the complementary One Pulse output */
  1162. TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);
  1163. /* Enable the Main Output */
  1164. __HAL_TIM_MOE_ENABLE(htim);
  1165. /* Return function status */
  1166. return HAL_OK;
  1167. }
  1168. /**
  1169. * @brief Stops the TIM One Pulse signal generation in interrupt mode on the
  1170. * complementary channel.
  1171. * @param htim TIM One Pulse handle
  1172. * @param OutputChannel TIM Channel to be disabled
  1173. * This parameter can be one of the following values:
  1174. * @arg TIM_CHANNEL_1: TIM Channel 1 selected
  1175. * @arg TIM_CHANNEL_2: TIM Channel 2 selected
  1176. * @retval HAL status
  1177. */
  1178. HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
  1179. {
  1180. /* Check the parameters */
  1181. assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
  1182. /* Disable the TIM Capture/Compare 1 interrupt */
  1183. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
  1184. /* Disable the TIM Capture/Compare 2 interrupt */
  1185. __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
  1186. /* Disable the complementary One Pulse output */
  1187. TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
  1188. /* Disable the Main Output */
  1189. __HAL_TIM_MOE_DISABLE(htim);
  1190. /* Disable the Peripheral */
  1191. __HAL_TIM_DISABLE(htim);
  1192. /* Return function status */
  1193. return HAL_OK;
  1194. }
  1195. /**
  1196. * @}
  1197. */
  1198. /** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
  1199. * @brief Peripheral Control functions
  1200. *
  1201. @verbatim
  1202. ==============================================================================
  1203. ##### Peripheral Control functions #####
  1204. ==============================================================================
  1205. [..]
  1206. This section provides functions allowing to:
  1207. (+) Configure the commutation event in case of use of the Hall sensor interface.
  1208. (+) Configure Output channels for OC and PWM mode.
  1209. (+) Configure Complementary channels, break features and dead time.
  1210. (+) Configure Master synchronization.
  1211. (+) Configure timer remapping capabilities.
  1212. (+) Select timer input source.
  1213. (+) Enable or disable channel grouping.
  1214. @endverbatim
  1215. * @{
  1216. */
  1217. /**
  1218. * @brief Configure the TIM commutation event sequence.
  1219. * @note This function is mandatory to use the commutation event in order to
  1220. * update the configuration at each commutation detection on the TRGI input of the Timer,
  1221. * the typical use of this feature is with the use of another Timer(interface Timer)
  1222. * configured in Hall sensor interface, this interface Timer will generate the
  1223. * commutation at its TRGO output (connected to Timer used in this function) each time
  1224. * the TI1 of the Interface Timer detect a commutation at its input TI1.
  1225. * @param htim TIM handle
  1226. * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
  1227. * This parameter can be one of the following values:
  1228. * @arg TIM_TS_ITR0: Internal trigger 0 selected
  1229. * @arg TIM_TS_ITR1: Internal trigger 1 selected
  1230. * @arg TIM_TS_ITR2: Internal trigger 2 selected
  1231. * @arg TIM_TS_ITR3: Internal trigger 3 selected
  1232. * @arg TIM_TS_ITR12: Internal trigger 12 selected (*)
  1233. * @arg TIM_TS_ITR13: Internal trigger 13 selected (*)
  1234. * @arg TIM_TS_NONE: No trigger is needed
  1235. * @param CommutationSource the Commutation Event source
  1236. * This parameter can be one of the following values:
  1237. * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  1238. * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
  1239. * @retval HAL status
  1240. */
  1241. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
  1242. uint32_t CommutationSource)
  1243. {
  1244. /* Check the parameters */
  1245. assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  1246. assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
  1247. __HAL_LOCK(htim);
  1248. if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
  1249. (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3) ||
  1250. (InputTrigger == TIM_TS_ITR12) || (InputTrigger == TIM_TS_ITR13))
  1251. {
  1252. /* Select the Input trigger */
  1253. htim->Instance->SMCR &= ~TIM_SMCR_TS;
  1254. htim->Instance->SMCR |= InputTrigger;
  1255. }
  1256. /* Select the Capture Compare preload feature */
  1257. htim->Instance->CR2 |= TIM_CR2_CCPC;
  1258. /* Select the Commutation event source */
  1259. htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  1260. htim->Instance->CR2 |= CommutationSource;
  1261. /* Disable Commutation Interrupt */
  1262. __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
  1263. /* Disable Commutation DMA request */
  1264. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
  1265. __HAL_UNLOCK(htim);
  1266. return HAL_OK;
  1267. }
  1268. /**
  1269. * @brief Configure the TIM commutation event sequence with interrupt.
  1270. * @note This function is mandatory to use the commutation event in order to
  1271. * update the configuration at each commutation detection on the TRGI input of the Timer,
  1272. * the typical use of this feature is with the use of another Timer(interface Timer)
  1273. * configured in Hall sensor interface, this interface Timer will generate the
  1274. * commutation at its TRGO output (connected to Timer used in this function) each time
  1275. * the TI1 of the Interface Timer detect a commutation at its input TI1.
  1276. * @param htim TIM handle
  1277. * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
  1278. * This parameter can be one of the following values:
  1279. * @arg TIM_TS_ITR0: Internal trigger 0 selected
  1280. * @arg TIM_TS_ITR1: Internal trigger 1 selected
  1281. * @arg TIM_TS_ITR2: Internal trigger 2 selected
  1282. * @arg TIM_TS_ITR3: Internal trigger 3 selected
  1283. * @arg TIM_TS_ITR2: Internal trigger 12 selected (*)
  1284. * @arg TIM_TS_ITR3: Internal trigger 13 selected (*)
  1285. * @arg TIM_TS_NONE: No trigger is needed
  1286. * @param CommutationSource the Commutation Event source
  1287. * This parameter can be one of the following values:
  1288. * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  1289. * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
  1290. * @retval HAL status
  1291. */
  1292. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
  1293. uint32_t CommutationSource)
  1294. {
  1295. /* Check the parameters */
  1296. assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  1297. assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
  1298. __HAL_LOCK(htim);
  1299. if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
  1300. (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3) ||
  1301. (InputTrigger == TIM_TS_ITR12) || (InputTrigger == TIM_TS_ITR13))
  1302. {
  1303. /* Select the Input trigger */
  1304. htim->Instance->SMCR &= ~TIM_SMCR_TS;
  1305. htim->Instance->SMCR |= InputTrigger;
  1306. }
  1307. /* Select the Capture Compare preload feature */
  1308. htim->Instance->CR2 |= TIM_CR2_CCPC;
  1309. /* Select the Commutation event source */
  1310. htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  1311. htim->Instance->CR2 |= CommutationSource;
  1312. /* Disable Commutation DMA request */
  1313. __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);
  1314. /* Enable the Commutation Interrupt */
  1315. __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);
  1316. __HAL_UNLOCK(htim);
  1317. return HAL_OK;
  1318. }
  1319. /**
  1320. * @brief Configure the TIM commutation event sequence with DMA.
  1321. * @note This function is mandatory to use the commutation event in order to
  1322. * update the configuration at each commutation detection on the TRGI input of the Timer,
  1323. * the typical use of this feature is with the use of another Timer(interface Timer)
  1324. * configured in Hall sensor interface, this interface Timer will generate the
  1325. * commutation at its TRGO output (connected to Timer used in this function) each time
  1326. * the TI1 of the Interface Timer detect a commutation at its input TI1.
  1327. * @note The user should configure the DMA in his own software, in This function only the COMDE bit is set
  1328. * @param htim TIM handle
  1329. * @param InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
  1330. * This parameter can be one of the following values:
  1331. * @arg TIM_TS_ITR0: Internal trigger 0 selected
  1332. * @arg TIM_TS_ITR1: Internal trigger 1 selected
  1333. * @arg TIM_TS_ITR2: Internal trigger 2 selected
  1334. * @arg TIM_TS_ITR3: Internal trigger 3 selected
  1335. * @arg TIM_TS_ITR2: Internal trigger 12 selected (*)
  1336. * @arg TIM_TS_ITR3: Internal trigger 13 selected (*)
  1337. * @arg TIM_TS_NONE: No trigger is needed
  1338. *
  1339. * (*) Value not defined in all devices.
  1340. *
  1341. * @param CommutationSource the Commutation Event source
  1342. * This parameter can be one of the following values:
  1343. * @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  1344. * @arg TIM_COMMUTATION_SOFTWARE: Commutation source is set by software using the COMG bit
  1345. * @retval HAL status
  1346. */
  1347. HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger,
  1348. uint32_t CommutationSource)
  1349. {
  1350. /* Check the parameters */
  1351. assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
  1352. assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
  1353. __HAL_LOCK(htim);
  1354. if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
  1355. (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3) ||
  1356. (InputTrigger == TIM_TS_ITR12) || (InputTrigger == TIM_TS_ITR13))
  1357. {
  1358. /* Select the Input trigger */
  1359. htim->Instance->SMCR &= ~TIM_SMCR_TS;
  1360. htim->Instance->SMCR |= InputTrigger;
  1361. }
  1362. /* Select the Capture Compare preload feature */
  1363. htim->Instance->CR2 |= TIM_CR2_CCPC;
  1364. /* Select the Commutation event source */
  1365. htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  1366. htim->Instance->CR2 |= CommutationSource;
  1367. /* Enable the Commutation DMA Request */
  1368. /* Set the DMA Commutation Callback */
  1369. htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
  1370. htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt;
  1371. /* Set the DMA error callback */
  1372. htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;
  1373. /* Disable Commutation Interrupt */
  1374. __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);
  1375. /* Enable the Commutation DMA Request */
  1376. __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);
  1377. __HAL_UNLOCK(htim);
  1378. return HAL_OK;
  1379. }
  1380. /**
  1381. * @brief Configures the TIM in master mode.
  1382. * @param htim TIM handle.
  1383. * @param sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that
  1384. * contains the selected trigger output (TRGO) and the Master/Slave
  1385. * mode.
  1386. * @retval HAL status
  1387. */
  1388. HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
  1389. TIM_MasterConfigTypeDef *sMasterConfig)
  1390. {
  1391. uint32_t tmpcr2;
  1392. uint32_t tmpsmcr;
  1393. /* Check the parameters */
  1394. assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
  1395. assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
  1396. assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
  1397. /* Check input state */
  1398. __HAL_LOCK(htim);
  1399. /* Change the handler state */
  1400. htim->State = HAL_TIM_STATE_BUSY;
  1401. /* Get the TIMx CR2 register value */
  1402. tmpcr2 = htim->Instance->CR2;
  1403. /* Get the TIMx SMCR register value */
  1404. tmpsmcr = htim->Instance->SMCR;
  1405. /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */
  1406. if (IS_TIM_TRGO2_INSTANCE(htim->Instance))
  1407. {
  1408. /* Check the parameters */
  1409. assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2));
  1410. /* Clear the MMS2 bits */
  1411. tmpcr2 &= ~TIM_CR2_MMS2;
  1412. /* Select the TRGO2 source*/
  1413. tmpcr2 |= sMasterConfig->MasterOutputTrigger2;
  1414. }
  1415. /* Reset the MMS Bits */
  1416. tmpcr2 &= ~TIM_CR2_MMS;
  1417. /* Select the TRGO source */
  1418. tmpcr2 |= sMasterConfig->MasterOutputTrigger;
  1419. /* Update TIMx CR2 */
  1420. htim->Instance->CR2 = tmpcr2;
  1421. if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
  1422. {
  1423. /* Reset the MSM Bit */
  1424. tmpsmcr &= ~TIM_SMCR_MSM;
  1425. /* Set master mode */
  1426. tmpsmcr |= sMasterConfig->MasterSlaveMode;
  1427. /* Update TIMx SMCR */
  1428. htim->Instance->SMCR = tmpsmcr;
  1429. }
  1430. /* Change the htim state */
  1431. htim->State = HAL_TIM_STATE_READY;
  1432. __HAL_UNLOCK(htim);
  1433. return HAL_OK;
  1434. }
  1435. /**
  1436. * @brief Configures the Break feature, dead time, Lock level, OSSI/OSSR State
  1437. * and the AOE(automatic output enable).
  1438. * @param htim TIM handle
  1439. * @param sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
  1440. * contains the BDTR Register configuration information for the TIM peripheral.
  1441. * @note Interrupts can be generated when an active level is detected on the
  1442. * break input, the break 2 input or the system break input. Break
  1443. * interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro.
  1444. * @retval HAL status
  1445. */
  1446. HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
  1447. TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
  1448. {
  1449. /* Keep this variable initialized to 0 as it is used to configure BDTR register */
  1450. uint32_t tmpbdtr = 0U;
  1451. /* Check the parameters */
  1452. assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
  1453. assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
  1454. assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
  1455. assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
  1456. assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
  1457. assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
  1458. assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
  1459. assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter));
  1460. assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
  1461. /* Check input state */
  1462. __HAL_LOCK(htim);
  1463. /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
  1464. the OSSI State, the dead time value and the Automatic Output Enable Bit */
  1465. /* Set the BDTR bits */
  1466. MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
  1467. MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
  1468. MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
  1469. MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
  1470. MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
  1471. MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
  1472. MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
  1473. MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos));
  1474. if (IS_TIM_BKIN2_INSTANCE(htim->Instance))
  1475. {
  1476. /* Check the parameters */
  1477. assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State));
  1478. assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity));
  1479. assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter));
  1480. /* Set the BREAK2 input related BDTR bits */
  1481. MODIFY_REG(tmpbdtr, TIM_BDTR_BK2F, (sBreakDeadTimeConfig->Break2Filter << TIM_BDTR_BK2F_Pos));
  1482. MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, sBreakDeadTimeConfig->Break2State);
  1483. MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity);
  1484. }
  1485. /* Set TIMx_BDTR */
  1486. htim->Instance->BDTR = tmpbdtr;
  1487. __HAL_UNLOCK(htim);
  1488. return HAL_OK;
  1489. }
  1490. #if defined(TIM_BREAK_INPUT_SUPPORT)
  1491. /**
  1492. * @brief Configures the break input source.
  1493. * @param htim TIM handle.
  1494. * @param BreakInput Break input to configure
  1495. * This parameter can be one of the following values:
  1496. * @arg TIM_BREAKINPUT_BRK: Timer break input
  1497. * @arg TIM_BREAKINPUT_BRK2: Timer break 2 input
  1498. * @param sBreakInputConfig Break input source configuration
  1499. * @retval HAL status
  1500. */
  1501. HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim,
  1502. uint32_t BreakInput,
  1503. TIMEx_BreakInputConfigTypeDef *sBreakInputConfig)
  1504. {
  1505. uint32_t tmporx;
  1506. uint32_t bkin_enable_mask;
  1507. uint32_t bkin_polarity_mask;
  1508. uint32_t bkin_enable_bitpos;
  1509. uint32_t bkin_polarity_bitpos;
  1510. /* Check the parameters */
  1511. assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
  1512. assert_param(IS_TIM_BREAKINPUT(BreakInput));
  1513. assert_param(IS_TIM_BREAKINPUTSOURCE(sBreakInputConfig->Source));
  1514. assert_param(IS_TIM_BREAKINPUTSOURCE_STATE(sBreakInputConfig->Enable));
  1515. if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
  1516. {
  1517. assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity));
  1518. }
  1519. /* Check input state */
  1520. __HAL_LOCK(htim);
  1521. switch (sBreakInputConfig->Source)
  1522. {
  1523. case TIM_BREAKINPUTSOURCE_BKIN:
  1524. {
  1525. bkin_enable_mask = TIM1_AF1_BKINE;
  1526. bkin_enable_bitpos = TIM1_AF1_BKINE_Pos;
  1527. bkin_polarity_mask = TIM1_AF1_BKINP;
  1528. bkin_polarity_bitpos = TIM1_AF1_BKINP_Pos;
  1529. break;
  1530. }
  1531. case TIM_BREAKINPUTSOURCE_COMP1:
  1532. {
  1533. bkin_enable_mask = TIM1_AF1_BKCMP1E;
  1534. bkin_enable_bitpos = TIM1_AF1_BKCMP1E_Pos;
  1535. bkin_polarity_mask = TIM1_AF1_BKCMP1P;
  1536. bkin_polarity_bitpos = TIM1_AF1_BKCMP1P_Pos;
  1537. break;
  1538. }
  1539. case TIM_BREAKINPUTSOURCE_COMP2:
  1540. {
  1541. bkin_enable_mask = TIM1_AF1_BKCMP2E;
  1542. bkin_enable_bitpos = TIM1_AF1_BKCMP2E_Pos;
  1543. bkin_polarity_mask = TIM1_AF1_BKCMP2P;
  1544. bkin_polarity_bitpos = TIM1_AF1_BKCMP2P_Pos;
  1545. break;
  1546. }
  1547. case TIM_BREAKINPUTSOURCE_DFSDM1:
  1548. {
  1549. bkin_enable_mask = TIM1_AF1_BKDF1BK0E;
  1550. bkin_enable_bitpos = 8U;
  1551. bkin_polarity_mask = 0U;
  1552. bkin_polarity_bitpos = 0U;
  1553. break;
  1554. }
  1555. default:
  1556. {
  1557. bkin_enable_mask = 0U;
  1558. bkin_polarity_mask = 0U;
  1559. bkin_enable_bitpos = 0U;
  1560. bkin_polarity_bitpos = 0U;
  1561. break;
  1562. }
  1563. }
  1564. switch (BreakInput)
  1565. {
  1566. case TIM_BREAKINPUT_BRK:
  1567. {
  1568. /* Get the TIMx_AF1 register value */
  1569. tmporx = htim->Instance->AF1;
  1570. /* Enable the break input */
  1571. tmporx &= ~bkin_enable_mask;
  1572. tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
  1573. /* Set the break input polarity */
  1574. if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
  1575. {
  1576. tmporx &= ~bkin_polarity_mask;
  1577. tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
  1578. }
  1579. /* Set TIMx_AF1 */
  1580. htim->Instance->AF1 = tmporx;
  1581. break;
  1582. }
  1583. case TIM_BREAKINPUT_BRK2:
  1584. {
  1585. /* Get the TIMx_AF2 register value */
  1586. tmporx = htim->Instance->AF2;
  1587. /* Enable the break input */
  1588. tmporx &= ~bkin_enable_mask;
  1589. tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
  1590. /* Set the break input polarity */
  1591. if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
  1592. {
  1593. tmporx &= ~bkin_polarity_mask;
  1594. tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
  1595. }
  1596. /* Set TIMx_AF2 */
  1597. htim->Instance->AF2 = tmporx;
  1598. break;
  1599. }
  1600. default:
  1601. break;
  1602. }
  1603. __HAL_UNLOCK(htim);
  1604. return HAL_OK;
  1605. }
  1606. #endif /*TIM_BREAK_INPUT_SUPPORT */
  1607. /**
  1608. * @brief Configures the TIMx Remapping input capabilities.
  1609. * @param htim TIM handle.
  1610. * @param Remap specifies the TIM remapping source.
  1611. * For TIM1, the parameter is one of the following values:
  1612. * @arg TIM_TIM1_ETR_GPIO: TIM1_ETR is connected to GPIO
  1613. * @arg TIM_TIM1_ETR_COMP1: TIM1_ETR is connected to COMP1 output
  1614. * @arg TIM_TIM1_ETR_COMP2: TIM1_ETR is connected to COMP2 output
  1615. * @arg TIM_TIM1_ETR_ADC1_AWD1: TIM1_ETR is connected to ADC1 AWD1
  1616. * @arg TIM_TIM1_ETR_ADC1_AWD2: TIM1_ETR is connected to ADC1 AWD2
  1617. * @arg TIM_TIM1_ETR_ADC1_AWD3: TIM1_ETR is connected to ADC1 AWD3
  1618. * @arg TIM_TIM1_ETR_ADC3_AWD1: TIM1_ETR is connected to ADC3 AWD1
  1619. * @arg TIM_TIM1_ETR_ADC3_AWD2: TIM1_ETR is connected to ADC3 AWD2
  1620. * @arg TIM_TIM1_ETR_ADC3_AWD3: TIM1_ETR is connected to ADC3 AWD3
  1621. *
  1622. * For TIM2, the parameter is one of the following values:
  1623. * @arg TIM_TIM2_ETR_GPIO: TIM2_ETR is connected to GPIO
  1624. * @arg TIM_TIM2_ETR_COMP1: TIM2_ETR is connected to COMP1 output
  1625. * @arg TIM_TIM2_ETR_COMP2: TIM2_ETR is connected to COMP2 output
  1626. * @arg TIM_TIM2_ETR_LSE: TIM2_ETR is connected to LSE
  1627. * @arg TIM_TIM2_ETR_SAI1_FSA: TIM2_ETR is connected to SAI1 FS_A
  1628. * @arg TIM_TIM2_ETR_SAI1_FSB: TIM2_ETR is connected to SAI1 FS_B
  1629. *
  1630. * For TIM3, the parameter is one of the following values:
  1631. * @arg TIM_TIM3_ETR_GPIO: TIM3_ETR is connected to GPIO
  1632. * @arg TIM_TIM3_ETR_COMP1: TIM3_ETR is connected to COMP1 output
  1633. *
  1634. * For TIM5, the parameter is one of the following values:
  1635. * @arg TIM_TIM5_ETR_GPIO: TIM5_ETR is connected to GPIO
  1636. * @arg TIM_TIM5_ETR_SAI2_FSA: TIM5_ETR is connected to SAI2 FS_A (*)
  1637. * @arg TIM_TIM5_ETR_SAI2_FSB: TIM5_ETR is connected to SAI2 FS_B (*)
  1638. * @arg TIM_TIM5_ETR_SAI4_FSA: TIM5_ETR is connected to SAI2 FS_A (*)
  1639. * @arg TIM_TIM5_ETR_SAI4_FSB: TIM5_ETR is connected to SAI2 FS_B (*)
  1640. *
  1641. * For TIM8, the parameter is one of the following values:
  1642. * @arg TIM_TIM8_ETR_GPIO: TIM8_ETR is connected to GPIO
  1643. * @arg TIM_TIM8_ETR_COMP1: TIM8_ETR is connected to COMP1 output
  1644. * @arg TIM_TIM8_ETR_COMP2: TIM8_ETR is connected to COMP2 output
  1645. * @arg TIM_TIM8_ETR_ADC2_AWD1: TIM8_ETR is connected to ADC2 AWD1
  1646. * @arg TIM_TIM8_ETR_ADC2_AWD2: TIM8_ETR is connected to ADC2 AWD2
  1647. * @arg TIM_TIM8_ETR_ADC2_AWD3: TIM8_ETR is connected to ADC2 AWD3
  1648. * @arg TIM_TIM8_ETR_ADC3_AWD1: TIM8_ETR is connected to ADC3 AWD1
  1649. * @arg TIM_TIM8_ETR_ADC3_AWD2: TIM8_ETR is connected to ADC3 AWD2
  1650. * @arg TIM_TIM8_ETR_ADC3_AWD3: TIM8_ETR is connected to ADC3 AWD3
  1651. *
  1652. * For TIM23, the parameter is one of the following values: (*)
  1653. * @arg TIM_TIM23_ETR_GPIO TIM23_ETR is connected to GPIO
  1654. * @arg TIM_TIM23_ETR_COMP1 TIM23_ETR is connected to COMP1 output
  1655. * @arg TIM_TIM23_ETR_COMP2 TIM23_ETR is connected to COMP2 output
  1656. *
  1657. * For TIM24, the parameter is one of the following values: (*)
  1658. * @arg TIM_TIM24_ETR_GPIO TIM24_ETR is connected to GPIO
  1659. * @arg TIM_TIM24_ETR_SAI4_FSA TIM24_ETR is connected to SAI4 FS_A
  1660. * @arg TIM_TIM24_ETR_SAI4_FSB TIM24_ETR is connected to SAI4 FS_B
  1661. * @arg TIM_TIM24_ETR_SAI1_FSA TIM24_ETR is connected to SAI1 FS_A
  1662. * @arg TIM_TIM24_ETR_SAI1_FSB TIM24_ETR is connected to SAI1 FS_B
  1663. *
  1664. * (*) Value not defined in all devices.
  1665. *
  1666. * @retval HAL status
  1667. */
  1668. HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
  1669. {
  1670. /* Check parameters */
  1671. assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance));
  1672. assert_param(IS_TIM_REMAP(Remap));
  1673. __HAL_LOCK(htim);
  1674. MODIFY_REG(htim->Instance->AF1, TIM1_AF1_ETRSEL_Msk, Remap);
  1675. __HAL_UNLOCK(htim);
  1676. return HAL_OK;
  1677. }
  1678. /**
  1679. * @brief Select the timer input source
  1680. * @param htim TIM handle.
  1681. * @param Channel specifies the TIM Channel
  1682. * This parameter can be one of the following values:
  1683. * @arg TIM_CHANNEL_1: TI1 input channel
  1684. * @arg TIM_CHANNEL_2: TI2 input channel
  1685. * @arg TIM_CHANNEL_3: TIM Channel 3
  1686. * @arg TIM_CHANNEL_4: TIM Channel 4
  1687. * @param TISelection parameter of the TIM_TISelectionStruct structure is detailed as follows:
  1688. * For TIM1, the parameter is one of the following values:
  1689. * @arg TIM_TIM1_TI1_GPIO: TIM1 TI1 is connected to GPIO
  1690. * @arg TIM_TIM1_TI1_COMP1: TIM1 TI1 is connected to COMP1 output
  1691. *
  1692. * For TIM2, the parameter is one of the following values:
  1693. * @arg TIM_TIM2_TI4_GPIO: TIM2 TI4 is connected to GPIO
  1694. * @arg TIM_TIM2_TI4_COMP1: TIM2 TI4 is connected to COMP1 output
  1695. * @arg TIM_TIM2_TI4_COMP2: TIM2 TI4 is connected to COMP2 output
  1696. * @arg TIM_TIM2_TI4_COMP1_COMP2: TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output
  1697. *
  1698. * For TIM3, the parameter is one of the following values:
  1699. * @arg TIM_TIM3_TI1_GPIO: TIM3 TI1 is connected to GPIO
  1700. * @arg TIM_TIM3_TI1_COMP1: TIM3 TI1 is connected to COMP1 output
  1701. * @arg TIM_TIM3_TI1_COMP2: TIM3 TI1 is connected to COMP2 output
  1702. * @arg TIM_TIM3_TI1_COMP1_COMP2: TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output
  1703. *
  1704. * For TIM5, the parameter is one of the following values:
  1705. * @arg TIM_TIM5_TI1_GPIO: TIM5 TI1 is connected to GPIO
  1706. * @arg TIM_TIM5_TI1_CAN_TMP: TIM5 TI1 is connected to CAN TMP
  1707. * @arg TIM_TIM5_TI1_CAN_RTP: TIM5 TI1 is connected to CAN RTP
  1708. *
  1709. * For TIM8, the parameter is one of the following values:
  1710. * @arg TIM_TIM8_TI1_GPIO: TIM8 TI1 is connected to GPIO
  1711. * @arg TIM_TIM8_TI1_COMP2: TIM8 TI1 is connected to COMP2 output
  1712. *
  1713. * For TIM12, the parameter can have the following values: (*)
  1714. * @arg TIM_TIM12_TI1_GPIO: TIM12 TI1 is connected to GPIO
  1715. * @arg TIM_TIM12_TI1_SPDIF_FS: TIM12 TI1 is connected to SPDIF FS
  1716. *
  1717. * For TIM15, the parameter is one of the following values:
  1718. * @arg TIM_TIM15_TI1_GPIO: TIM15 TI1 is connected to GPIO
  1719. * @arg TIM_TIM15_TI1_TIM2: TIM15 TI1 is connected to TIM2 CH1
  1720. * @arg TIM_TIM15_TI1_TIM3: TIM15 TI1 is connected to TIM3 CH1
  1721. * @arg TIM_TIM15_TI1_TIM4: TIM15 TI1 is connected to TIM4 CH1
  1722. * @arg TIM_TIM15_TI1_LSE: TIM15 TI1 is connected to LSE
  1723. * @arg TIM_TIM15_TI1_CSI: TIM15 TI1 is connected to CSI
  1724. * @arg TIM_TIM15_TI1_MCO2: TIM15 TI1 is connected to MCO2
  1725. * @arg TIM_TIM15_TI2_GPIO: TIM15 TI2 is connected to GPIO
  1726. * @arg TIM_TIM15_TI2_TIM2: TIM15 TI2 is connected to TIM2 CH2
  1727. * @arg TIM_TIM15_TI2_TIM3: TIM15 TI2 is connected to TIM3 CH2
  1728. * @arg TIM_TIM15_TI2_TIM4: TIM15 TI2 is connected to TIM4 CH2
  1729. *
  1730. * For TIM16, the parameter can have the following values:
  1731. * @arg TIM_TIM16_TI1_GPIO: TIM16 TI1 is connected to GPIO
  1732. * @arg TIM_TIM16_TI1_LSI: TIM16 TI1 is connected to LSI
  1733. * @arg TIM_TIM16_TI1_LSE: TIM16 TI1 is connected to LSE
  1734. * @arg TIM_TIM16_TI1_RTC: TIM16 TI1 is connected to RTC wakeup interrupt
  1735. *
  1736. * For TIM17, the parameter can have the following values:
  1737. * @arg TIM_TIM17_TI1_GPIO: TIM17 TI1 is connected to GPIO
  1738. * @arg TIM_TIM17_TI1_SPDIF_FS: TIM17 TI1 is connected to SPDIF FS (*)
  1739. * @arg TIM_TIM17_TI1_HSE_1MHZ: TIM17 TI1 is connected to HSE 1MHz
  1740. * @arg TIM_TIM17_TI1_MCO1: TIM17 TI1 is connected to MCO1
  1741. *
  1742. * For TIM23, the parameter can have the following values: (*)
  1743. * @arg TIM_TIM23_TI4_GPIO TIM23_TI4 is connected to GPIO
  1744. * @arg TIM_TIM23_TI4_COMP1 TIM23_TI4 is connected to COMP1 output
  1745. * @arg TIM_TIM23_TI4_COMP2 TIM23_TI4 is connected to COMP2 output
  1746. * @arg TIM_TIM23_TI4_COMP1_COMP2 TIM23_TI4 is connected to COMP2 output
  1747. *
  1748. * For TIM24, the parameter can have the following values: (*)
  1749. * @arg TIM_TIM24_TI1_GPIO TIM24_TI1 is connected to GPIO
  1750. * @arg TIM_TIM24_TI1_CAN_TMP TIM24_TI1 is connected to CAN_TMP
  1751. * @arg TIM_TIM24_TI1_CAN_RTP TIM24_TI1 is connected to CAN_RTP
  1752. * @arg TIM_TIM24_TI1_CAN_SOC TIM24_TI1 is connected to CAN_SOC
  1753. *
  1754. * (*) Value not defined in all devices. \n
  1755. * @retval HAL status
  1756. */
  1757. HAL_StatusTypeDef HAL_TIMEx_TISelection(TIM_HandleTypeDef *htim, uint32_t TISelection, uint32_t Channel)
  1758. {
  1759. HAL_StatusTypeDef status = HAL_OK;
  1760. /* Check parameters */
  1761. assert_param(IS_TIM_TISEL_INSTANCE(htim->Instance));
  1762. assert_param(IS_TIM_TISEL(TISelection));
  1763. __HAL_LOCK(htim);
  1764. switch (Channel)
  1765. {
  1766. case TIM_CHANNEL_1:
  1767. MODIFY_REG(htim->Instance->TISEL, TIM_TISEL_TI1SEL, TISelection);
  1768. break;
  1769. case TIM_CHANNEL_2:
  1770. MODIFY_REG(htim->Instance->TISEL, TIM_TISEL_TI2SEL, TISelection);
  1771. break;
  1772. case TIM_CHANNEL_3:
  1773. MODIFY_REG(htim->Instance->TISEL, TIM_TISEL_TI3SEL, TISelection);
  1774. break;
  1775. case TIM_CHANNEL_4:
  1776. MODIFY_REG(htim->Instance->TISEL, TIM_TISEL_TI4SEL, TISelection);
  1777. break;
  1778. default:
  1779. status = HAL_ERROR;
  1780. break;
  1781. }
  1782. __HAL_UNLOCK(htim);
  1783. return status;
  1784. }
  1785. /**
  1786. * @brief Group channel 5 and channel 1, 2 or 3
  1787. * @param htim TIM handle.
  1788. * @param Channels specifies the reference signal(s) the OC5REF is combined with.
  1789. * This parameter can be any combination of the following values:
  1790. * TIM_GROUPCH5_NONE: No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC
  1791. * TIM_GROUPCH5_OC1REFC: OC1REFC is the logical AND of OC1REFC and OC5REF
  1792. * TIM_GROUPCH5_OC2REFC: OC2REFC is the logical AND of OC2REFC and OC5REF
  1793. * TIM_GROUPCH5_OC3REFC: OC3REFC is the logical AND of OC3REFC and OC5REF
  1794. * @retval HAL status
  1795. */
  1796. HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels)
  1797. {
  1798. /* Check parameters */
  1799. assert_param(IS_TIM_COMBINED3PHASEPWM_INSTANCE(htim->Instance));
  1800. assert_param(IS_TIM_GROUPCH5(Channels));
  1801. /* Process Locked */
  1802. __HAL_LOCK(htim);
  1803. htim->State = HAL_TIM_STATE_BUSY;
  1804. /* Clear GC5Cx bit fields */
  1805. htim->Instance->CCR5 &= ~(TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1);
  1806. /* Set GC5Cx bit fields */
  1807. htim->Instance->CCR5 |= Channels;
  1808. /* Change the htim state */
  1809. htim->State = HAL_TIM_STATE_READY;
  1810. __HAL_UNLOCK(htim);
  1811. return HAL_OK;
  1812. }
  1813. /**
  1814. * @}
  1815. */
  1816. /** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
  1817. * @brief Extended Callbacks functions
  1818. *
  1819. @verbatim
  1820. ==============================================================================
  1821. ##### Extended Callbacks functions #####
  1822. ==============================================================================
  1823. [..]
  1824. This section provides Extended TIM callback functions:
  1825. (+) Timer Commutation callback
  1826. (+) Timer Break callback
  1827. @endverbatim
  1828. * @{
  1829. */
  1830. /**
  1831. * @brief Hall commutation changed callback in non-blocking mode
  1832. * @param htim TIM handle
  1833. * @retval None
  1834. */
  1835. __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
  1836. {
  1837. /* Prevent unused argument(s) compilation warning */
  1838. UNUSED(htim);
  1839. /* NOTE : This function should not be modified, when the callback is needed,
  1840. the HAL_TIMEx_CommutCallback could be implemented in the user file
  1841. */
  1842. }
  1843. /**
  1844. * @brief Hall commutation changed half complete callback in non-blocking mode
  1845. * @param htim TIM handle
  1846. * @retval None
  1847. */
  1848. __weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim)
  1849. {
  1850. /* Prevent unused argument(s) compilation warning */
  1851. UNUSED(htim);
  1852. /* NOTE : This function should not be modified, when the callback is needed,
  1853. the HAL_TIMEx_CommutHalfCpltCallback could be implemented in the user file
  1854. */
  1855. }
  1856. /**
  1857. * @brief Hall Break detection callback in non-blocking mode
  1858. * @param htim TIM handle
  1859. * @retval None
  1860. */
  1861. __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
  1862. {
  1863. /* Prevent unused argument(s) compilation warning */
  1864. UNUSED(htim);
  1865. /* NOTE : This function should not be modified, when the callback is needed,
  1866. the HAL_TIMEx_BreakCallback could be implemented in the user file
  1867. */
  1868. }
  1869. /**
  1870. * @brief Hall Break2 detection callback in non blocking mode
  1871. * @param htim: TIM handle
  1872. * @retval None
  1873. */
  1874. __weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim)
  1875. {
  1876. /* Prevent unused argument(s) compilation warning */
  1877. UNUSED(htim);
  1878. /* NOTE : This function Should not be modified, when the callback is needed,
  1879. the HAL_TIMEx_Break2Callback could be implemented in the user file
  1880. */
  1881. }
  1882. /**
  1883. * @}
  1884. */
  1885. /** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
  1886. * @brief Extended Peripheral State functions
  1887. *
  1888. @verbatim
  1889. ==============================================================================
  1890. ##### Extended Peripheral State functions #####
  1891. ==============================================================================
  1892. [..]
  1893. This subsection permits to get in run-time the status of the peripheral
  1894. and the data flow.
  1895. @endverbatim
  1896. * @{
  1897. */
  1898. /**
  1899. * @brief Return the TIM Hall Sensor interface handle state.
  1900. * @param htim TIM Hall Sensor handle
  1901. * @retval HAL state
  1902. */
  1903. HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
  1904. {
  1905. return htim->State;
  1906. }
  1907. /**
  1908. * @}
  1909. */
  1910. /**
  1911. * @}
  1912. */
  1913. /* Private functions ---------------------------------------------------------*/
  1914. /** @defgroup TIMEx_Private_Functions TIMEx Private Functions
  1915. * @{
  1916. */
  1917. /**
  1918. * @brief TIM DMA Commutation callback.
  1919. * @param hdma pointer to DMA handle.
  1920. * @retval None
  1921. */
  1922. void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
  1923. {
  1924. TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  1925. /* Change the htim state */
  1926. htim->State = HAL_TIM_STATE_READY;
  1927. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  1928. htim->CommutationCallback(htim);
  1929. #else
  1930. HAL_TIMEx_CommutCallback(htim);
  1931. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  1932. }
  1933. /**
  1934. * @brief TIM DMA Commutation half complete callback.
  1935. * @param hdma pointer to DMA handle.
  1936. * @retval None
  1937. */
  1938. void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma)
  1939. {
  1940. TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
  1941. /* Change the htim state */
  1942. htim->State = HAL_TIM_STATE_READY;
  1943. #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  1944. htim->CommutationHalfCpltCallback(htim);
  1945. #else
  1946. HAL_TIMEx_CommutHalfCpltCallback(htim);
  1947. #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  1948. }
  1949. /**
  1950. * @brief Enables or disables the TIM Capture Compare Channel xN.
  1951. * @param TIMx to select the TIM peripheral
  1952. * @param Channel specifies the TIM Channel
  1953. * This parameter can be one of the following values:
  1954. * @arg TIM_CHANNEL_1: TIM Channel 1
  1955. * @arg TIM_CHANNEL_2: TIM Channel 2
  1956. * @arg TIM_CHANNEL_3: TIM Channel 3
  1957. * @param ChannelNState specifies the TIM Channel CCxNE bit new state.
  1958. * This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
  1959. * @retval None
  1960. */
  1961. static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
  1962. {
  1963. uint32_t tmp;
  1964. tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
  1965. /* Reset the CCxNE Bit */
  1966. TIMx->CCER &= ~tmp;
  1967. /* Set or reset the CCxNE Bit */
  1968. TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
  1969. }
  1970. /**
  1971. * @}
  1972. */
  1973. #endif /* HAL_TIM_MODULE_ENABLED */
  1974. /**
  1975. * @}
  1976. */
  1977. /**
  1978. * @}
  1979. */
  1980. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/