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  1. /**
  2. ******************************************************************************
  3. * @file stm32wbxx_hal_pwr.h
  4. * @author MCD Application Team
  5. * @brief Header file of PWR HAL module.
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. */
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef STM32WBxx_HAL_PWR_H
  21. #define STM32WBxx_HAL_PWR_H
  22. #ifdef __cplusplus
  23. extern "C" {
  24. #endif
  25. /* Includes ------------------------------------------------------------------*/
  26. #include "stm32wbxx_hal_def.h"
  27. /* Include low level driver */
  28. #include "stm32wbxx_ll_pwr.h"
  29. #include "stm32wbxx_ll_exti.h"
  30. /** @addtogroup STM32WBxx_HAL_Driver
  31. * @{
  32. */
  33. /** @defgroup PWR PWR
  34. * @brief PWR HAL module driver
  35. * @{
  36. */
  37. /* Exported types ------------------------------------------------------------*/
  38. /** @defgroup PWR_Exported_Types PWR Exported Types
  39. * @{
  40. */
  41. /**
  42. * @brief PWR PVD configuration structure definition
  43. */
  44. typedef struct
  45. {
  46. uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
  47. This parameter can be a value of @ref PWR_PVD_detection_level. */
  48. uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
  49. This parameter can be a value of @ref PWR_PVD_Mode. */
  50. }PWR_PVDTypeDef;
  51. /**
  52. * @}
  53. */
  54. /* Exported constants --------------------------------------------------------*/
  55. /** @defgroup PWR_Exported_Constants PWR Exported Constants
  56. * @{
  57. */
  58. /** @defgroup PWR_PVD_detection_level Power Voltage Detector Level selection
  59. * @note Refer datasheet for selection voltage value
  60. * @{
  61. */
  62. #define PWR_PVDLEVEL_0 (0x00000000U) /*!< PVD threshold around 2.0 V */
  63. #define PWR_PVDLEVEL_1 ( PWR_CR2_PLS_0) /*!< PVD threshold around 2.2 V */
  64. #define PWR_PVDLEVEL_2 ( PWR_CR2_PLS_1 ) /*!< PVD threshold around 2.4 V */
  65. #define PWR_PVDLEVEL_3 ( PWR_CR2_PLS_1 | PWR_CR2_PLS_0) /*!< PVD threshold around 2.5 V */
  66. #define PWR_PVDLEVEL_4 (PWR_CR2_PLS_2 ) /*!< PVD threshold around 2.6 V */
  67. #define PWR_PVDLEVEL_5 (PWR_CR2_PLS_2 | PWR_CR2_PLS_0) /*!< PVD threshold around 2.8 V */
  68. #define PWR_PVDLEVEL_6 (PWR_CR2_PLS_2 | PWR_CR2_PLS_1 ) /*!< PVD threshold around 2.9 V */
  69. #define PWR_PVDLEVEL_7 (PWR_CR2_PLS_2 | PWR_CR2_PLS_1 | PWR_CR2_PLS_0) /*!< External input analog voltage (compared internally to VREFINT) */
  70. /**
  71. * @}
  72. */
  73. /** @defgroup PWR_PVD_Mode PWR PVD interrupt and event mode
  74. * @{
  75. */
  76. /* Note: On STM32WB serie, power PVD event is not available on AIEC lines */
  77. /* (only interruption is available through AIEC line 16). */
  78. #define PWR_PVD_MODE_NORMAL (0x00000000U) /*!< Basic mode is used */
  79. #define PWR_PVD_MODE_IT_RISING (PVD_MODE_IT | PVD_RISING_EDGE) /*!< External Interrupt Mode with Rising edge trigger detection */
  80. #define PWR_PVD_MODE_IT_FALLING (PVD_MODE_IT | PVD_FALLING_EDGE) /*!< External Interrupt Mode with Falling edge trigger detection */
  81. #define PWR_PVD_MODE_IT_RISING_FALLING (PVD_MODE_IT | PVD_RISING_FALLING_EDGE) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
  82. /**
  83. * @}
  84. */
  85. /* Note: On STM32WB serie, power PVD event is not available on AIEC lines */
  86. /* (only interruption is available through AIEC line 16). */
  87. /** @defgroup PWR_Low_Power_Mode_Selection PWR Low Power Mode Selection
  88. * @{
  89. */
  90. #define PWR_LOWPOWERMODE_STOP0 (0x00000000u) /*!< Stop 0: stop mode with main regulator */
  91. #define PWR_LOWPOWERMODE_STOP1 (PWR_CR1_LPMS_0) /*!< Stop 1: stop mode with low power regulator */
  92. #define PWR_LOWPOWERMODE_STOP2 (PWR_CR1_LPMS_1) /*!< Stop 2: stop mode with low power regulator and VDD12I interruptible digital core domain supply OFF (less peripherals activated than low power mode stop 1 to reduce power consumption)*/
  93. #define PWR_LOWPOWERMODE_STANDBY (PWR_CR1_LPMS_0 | PWR_CR1_LPMS_1) /*!< Standby mode */
  94. #define PWR_LOWPOWERMODE_SHUTDOWN (PWR_CR1_LPMS_2) /*!< Shutdown mode */
  95. /**
  96. * @}
  97. */
  98. /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR regulator mode
  99. * @{
  100. */
  101. #define PWR_MAINREGULATOR_ON (0x00000000U) /*!< Regulator in main mode */
  102. #define PWR_LOWPOWERREGULATOR_ON (PWR_CR1_LPR) /*!< Regulator in low-power mode */
  103. /**
  104. * @}
  105. */
  106. /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
  107. * @{
  108. */
  109. #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) /*!< Wait For Interruption instruction to enter Sleep mode */
  110. #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) /*!< Wait For Event instruction to enter Sleep mode */
  111. /**
  112. * @}
  113. */
  114. /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
  115. * @{
  116. */
  117. #define PWR_STOPENTRY_WFI ((uint8_t)0x01) /*!< Wait For Interruption instruction to enter Stop mode */
  118. #define PWR_STOPENTRY_WFE ((uint8_t)0x02) /*!< Wait For Event instruction to enter Stop mode */
  119. /**
  120. * @}
  121. */
  122. /**
  123. * @}
  124. */
  125. /* Private define ------------------------------------------------------------*/
  126. /** @defgroup PWR_Private_Defines PWR Private Defines
  127. * @{
  128. */
  129. /** @defgroup PWR_PVD_EXTI_LINE PWR PVD external interrupt line
  130. * @{
  131. */
  132. #define PWR_EXTI_LINE_PVD (LL_EXTI_LINE_16) /*!< External interrupt line 16 Connected to the PWR PVD */
  133. /**
  134. * @}
  135. */
  136. /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask
  137. * @{
  138. */
  139. /* Note: On STM32WB serie, power PVD event is not available on AIEC lines */
  140. /* (only interruption is available through AIEC line 16). */
  141. #define PVD_MODE_IT (0x00010000U) /*!< Mask for interruption yielded by PVD threshold crossing */
  142. #define PVD_RISING_EDGE (0x00000001U) /*!< Mask for rising edge set as PVD trigger */
  143. #define PVD_FALLING_EDGE (0x00000002U) /*!< Mask for falling edge set as PVD trigger */
  144. #define PVD_RISING_FALLING_EDGE (0x00000003U) /*!< Mask for rising and falling edges set as PVD trigger */
  145. /**
  146. * @}
  147. */
  148. /**
  149. * @}
  150. */
  151. /* Exported macros -----------------------------------------------------------*/
  152. /** @defgroup PWR_Exported_Macros PWR Exported Macros
  153. * @{
  154. */
  155. /** @brief Check whether or not a specific PWR flag is set.
  156. * @param __FLAG__ specifies the flag to check.
  157. * This parameter can be one of the following values:
  158. *
  159. * /--------------------------------SR1-------------------------------/
  160. * @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event
  161. * was received from the WKUP pin 1.
  162. * @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event
  163. * was received from the WKUP pin 2.
  164. * @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event
  165. * was received from the WKUP pin 3.
  166. * @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event
  167. * was received from the WKUP pin 4.
  168. * @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event
  169. * was received from the WKUP pin 5.
  170. *
  171. * @arg @ref PWR_FLAG_BHWF BLE_Host WakeUp Flag
  172. * @arg @ref PWR_FLAG_FRCBYPI SMPS Forced in Bypass Interrupt Flag
  173. * @arg @ref PWR_FLAG_RFPHASEI Radio Phase Interrupt Flag
  174. * @arg @ref PWR_FLAG_BLEACTI BLE Activity Interrupt Flag
  175. * @arg @ref PWR_FLAG_802ACTI 802.15.4 Activity Interrupt Flag
  176. * @arg @ref PWR_FLAG_HOLDC2I CPU2 on-Hold Interrupt Flag
  177. * @arg @ref PWR_FLAG_WUFI Wake-Up Flag Internal. Set when a wakeup is detected on
  178. * the internal wakeup line.
  179. *
  180. * @arg @ref PWR_FLAG_SMPSRDYF SMPS Ready Flag
  181. * @arg @ref PWR_FLAG_SMPSBYPF SMPS Bypass Flag
  182. *
  183. * /--------------------------------SR2-------------------------------/
  184. * @arg @ref PWR_FLAG_REGLPS Low Power Regulator Started. Indicates whether or not the
  185. * low-power regulator is ready.
  186. * @arg @ref PWR_FLAG_REGLPF Low Power Regulator Flag. Indicates whether the
  187. * regulator is ready in main mode or is in low-power mode.
  188. *
  189. * @arg @ref PWR_FLAG_VOSF Voltage Scaling Flag. Indicates whether the regulator is ready
  190. * in the selected voltage range or is still changing to the required voltage level.
  191. * @arg @ref PWR_FLAG_PVDO Power Voltage Detector Output. Indicates whether VDD voltage is
  192. * below or above the selected PVD threshold.
  193. *
  194. * @arg @ref PWR_FLAG_PVMO1 Peripheral Voltage Monitoring Output 1. Indicates whether VDDUSB voltage is
  195. * is below or above PVM1 threshold (applicable when USB feature is supported).
  196. * @arg @ref PWR_FLAG_PVMO3 Peripheral Voltage Monitoring Output 3. Indicates whether VDDA voltage is
  197. * is below or above PVM3 threshold.
  198. *
  199. * /----------------------------EXTSCR--------------------------/
  200. * @arg @ref PWR_FLAG_STOP System Stop Flag for CPU1.
  201. * @arg @ref PWR_FLAG_SB System Standby Flag for CPU1.
  202. *
  203. * @arg @ref PWR_FLAG_C2STOP System Stop Flag for CPU2.
  204. * @arg @ref PWR_FLAG_C2SB System Standby Flag for CPU2.
  205. *
  206. * @arg @ref PWR_FLAG_CRITICAL_RF_PHASE Critical radio system phase flag.
  207. *
  208. * @arg @ref PWR_FLAG_C1DEEPSLEEP CPU1 DeepSleep Flag.
  209. * @arg @ref PWR_FLAG_C2DEEPSLEEP CPU2 DeepSleep Flag.
  210. *
  211. * @retval The new state of __FLAG__ (TRUE or FALSE).
  212. */
  213. #define __HAL_PWR_GET_FLAG(__FLAG__) ((((__FLAG__) & PWR_FLAG_REG_MASK) == PWR_FLAG_REG_SR1) ? \
  214. ( \
  215. PWR->SR1 & (1UL << ((__FLAG__) & 31UL)) \
  216. ) \
  217. : \
  218. ( \
  219. (((__FLAG__) & PWR_FLAG_REG_MASK) == PWR_FLAG_REG_SR2) ? \
  220. ( \
  221. PWR->SR2 & (1UL << ((__FLAG__) & 31UL)) \
  222. ) \
  223. : \
  224. ( \
  225. PWR->EXTSCR & (1UL << ((__FLAG__) & 31UL)) \
  226. ) \
  227. ) \
  228. )
  229. /** @brief Clear a specific PWR flag.
  230. * @note Clearing of flags {PWR_FLAG_STOP, PWR_FLAG_SB}
  231. * and flags {PWR_FLAG_C2STOP, PWR_FLAG_C2SB} are grouped:
  232. * clearing of one flag also clears the other one.
  233. * @param __FLAG__ specifies the flag to clear.
  234. * This parameter can be one of the following values:
  235. *
  236. * /--------------------------------SCR (SRR)------------------------------/
  237. * @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event
  238. * was received from the WKUP pin 1.
  239. * @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event
  240. * was received from the WKUP pin 2.
  241. * @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event
  242. * was received from the WKUP pin 3.
  243. * @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event
  244. * was received from the WKUP pin 4.
  245. * @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event
  246. * was received from the WKUP pin 5.
  247. * @arg @ref PWR_FLAG_WU Encompasses all five Wake Up Flags.
  248. *
  249. * @arg @ref PWR_FLAG_BHWF Clear BLE_Host Wakeup Flag.
  250. * @arg @ref PWR_FLAG_FRCBYPI Clear SMPS Forced in Bypass Interrupt Flag.
  251. * @arg @ref PWR_FLAG_RFPHASEI RF Phase Interrupt Clear.
  252. * @arg @ref PWR_FLAG_BLEACTI BLE Activity Interrupt Clear.
  253. * @arg @ref PWR_FLAG_802ACTI 802.15.4. Activity Interrupt Clear.
  254. * @arg @ref PWR_FLAG_HOLDC2I CPU2 on-Hold Interrupt Clear.
  255. *
  256. * /----------------------------EXTSCR--------------------------/
  257. * @arg @ref PWR_FLAG_STOP System Stop Flag for CPU1.
  258. * @arg @ref PWR_FLAG_SB System Standby Flag for CPU1.
  259. *
  260. * @arg @ref PWR_FLAG_C2STOP System Stop Flag for CPU2.
  261. * @arg @ref PWR_FLAG_C2SB System Standby Flag for CPU2.
  262. *
  263. * @arg @ref PWR_FLAG_CRITICAL_RF_PHASE RF phase Flag.
  264. *
  265. * @retval None
  266. */
  267. #define __HAL_PWR_CLEAR_FLAG(__FLAG__) ((((__FLAG__) & PWR_FLAG_REG_MASK) == PWR_FLAG_REG_EXTSCR) ? \
  268. ( \
  269. PWR->EXTSCR = (1UL << (((__FLAG__) & PWR_FLAG_EXTSCR_CLR_MASK) >> PWR_FLAG_EXTSCR_CLR_POS)) \
  270. ) \
  271. : \
  272. ( \
  273. (((__FLAG__)) == PWR_FLAG_WU) ? \
  274. (PWR->SCR = PWR_SCR_CWUF) : \
  275. (PWR->SCR = (1UL << ((__FLAG__) & 31UL))) \
  276. ) \
  277. )
  278. /**
  279. * @brief Enable the PVD Extended Interrupt C1 Line.
  280. * @retval None
  281. */
  282. #define __HAL_PWR_PVD_EXTI_ENABLE_IT() LL_EXTI_EnableIT_0_31(PWR_EXTI_LINE_PVD)
  283. /**
  284. * @brief Enable the PVD Extended Interrupt C2 Line.
  285. * @retval None
  286. */
  287. #define __HAL_PWR_PVD_EXTIC2_ENABLE_IT() LL_C2_EXTI_EnableIT_0_31(PWR_EXTI_LINE_PVD)
  288. /**
  289. * @brief Disable the PVD Extended Interrupt C1 Line.
  290. * @retval None
  291. */
  292. #define __HAL_PWR_PVD_EXTI_DISABLE_IT() LL_EXTI_DisableIT_0_31(PWR_EXTI_LINE_PVD)
  293. /**
  294. * @brief Disable the PVD Extended Interrupt C2 Line.
  295. * @retval None
  296. */
  297. #define __HAL_PWR_PVD_EXTIC2_DISABLE_IT() LL_C2_EXTI_DisableIT_0_31(PWR_EXTI_LINE_PVD)
  298. /* Note: On STM32WB serie, power PVD event is not available on AIEC lines */
  299. /* (only interruption is available through AIEC line 16). */
  300. /**
  301. * @brief Enable the PVD Extended Interrupt Rising Trigger.
  302. * @note PVD flag polarity is inverted compared to EXTI line, therefore
  303. * EXTI rising and falling logic edges are inverted versus PVD voltage edges.
  304. * @retval None
  305. */
  306. #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() LL_EXTI_EnableRisingTrig_0_31(PWR_EXTI_LINE_PVD)
  307. /**
  308. * @brief Disable the PVD Extended Interrupt Rising Trigger.
  309. * @note PVD flag polarity is inverted compared to EXTI line, therefore
  310. * EXTI rising and falling logic edges are inverted versus PVD voltage edges.
  311. * @retval None
  312. */
  313. #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() LL_EXTI_DisableFallingTrig_0_31(PWR_EXTI_LINE_PVD)
  314. /**
  315. * @brief Enable the PVD Extended Interrupt Falling Trigger.
  316. * @note PVD flag polarity is inverted compared to EXTI line, therefore
  317. * EXTI rising and falling logic edges are inverted versus PVD voltage edges.
  318. * @retval None
  319. */
  320. #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() LL_EXTI_EnableFallingTrig_0_31(PWR_EXTI_LINE_PVD)
  321. /**
  322. * @brief Disable the PVD Extended Interrupt Falling Trigger.
  323. * @note PVD flag polarity is inverted compared to EXTI line, therefore
  324. * EXTI rising and falling logic edges are inverted versus PVD voltage edges.
  325. * @retval None
  326. */
  327. #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() LL_EXTI_DisableRisingTrig_0_31(PWR_EXTI_LINE_PVD)
  328. /**
  329. * @brief Enable the PVD Extended Interrupt Rising & Falling Trigger.
  330. * @retval None
  331. */
  332. #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \
  333. do { \
  334. __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \
  335. __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \
  336. } while(0)
  337. /**
  338. * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
  339. * @retval None
  340. */
  341. #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \
  342. do { \
  343. __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \
  344. __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \
  345. } while(0)
  346. /**
  347. * @brief Generate a Software interrupt on selected EXTI line.
  348. * @retval None
  349. */
  350. #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() LL_EXTI_GenerateSWI_0_31(PWR_EXTI_LINE_PVD)
  351. /**
  352. * @brief Check whether or not the PVD EXTI interrupt flag is set.
  353. * @retval EXTI PVD Line Status.
  354. */
  355. #define __HAL_PWR_PVD_EXTI_GET_FLAG() LL_EXTI_ReadFlag_0_31(PWR_EXTI_LINE_PVD)
  356. /**
  357. * @brief Clear the PVD EXTI interrupt flag.
  358. * @retval None
  359. */
  360. #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() LL_EXTI_ClearFlag_0_31(PWR_EXTI_LINE_PVD)
  361. /**
  362. * @}
  363. */
  364. /* Private macros --------------------------------------------------------*/
  365. /** @defgroup PWR_Private_Macros PWR Private Macros
  366. * @{
  367. */
  368. #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
  369. ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
  370. ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
  371. ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
  372. #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_NORMAL) ||\
  373. ((MODE) == PWR_PVD_MODE_IT_RISING) ||\
  374. ((MODE) == PWR_PVD_MODE_IT_FALLING) ||\
  375. ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING))
  376. #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
  377. ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
  378. #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || \
  379. ((ENTRY) == PWR_SLEEPENTRY_WFE))
  380. #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || \
  381. ((ENTRY) == PWR_STOPENTRY_WFE))
  382. /**
  383. * @}
  384. */
  385. /* Include PWR HAL Extended module */
  386. #include "stm32wbxx_hal_pwr_ex.h"
  387. /* Exported functions --------------------------------------------------------*/
  388. /** @defgroup PWR_Exported_Functions PWR Exported Functions
  389. * @{
  390. */
  391. /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
  392. * @{
  393. */
  394. /* Initialization and de-initialization functions *******************************/
  395. void HAL_PWR_DeInit(void);
  396. void HAL_PWR_EnableBkUpAccess(void);
  397. void HAL_PWR_DisableBkUpAccess(void);
  398. /**
  399. * @}
  400. */
  401. /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions
  402. * @{
  403. */
  404. /* Peripheral Control functions ************************************************/
  405. HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
  406. void HAL_PWR_EnablePVD(void);
  407. void HAL_PWR_DisablePVD(void);
  408. /* WakeUp pins configuration functions ****************************************/
  409. void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity);
  410. void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
  411. /* Low Power modes configuration functions ************************************/
  412. void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
  413. void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
  414. void HAL_PWR_EnterSTANDBYMode(void);
  415. void HAL_PWR_PVDCallback(void);
  416. void HAL_PWR_EnableSleepOnExit(void);
  417. void HAL_PWR_DisableSleepOnExit(void);
  418. void HAL_PWR_EnableSEVOnPend(void);
  419. void HAL_PWR_DisableSEVOnPend(void);
  420. /**
  421. * @}
  422. */
  423. /**
  424. * @}
  425. */
  426. /**
  427. * @}
  428. */
  429. /**
  430. * @}
  431. */
  432. /**
  433. * @}
  434. */
  435. #ifdef __cplusplus
  436. }
  437. #endif
  438. #endif /* STM32WBxx_HAL_PWR_H */
  439. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/